III B.E. (Information Technology)

VI SEMESTER

6 IT 2 MICROELECTRONICS

1        Introduction: (a) Circuits and Models: Introduction to VLSI, circuits ASICs and Moore’s Law. Microelectronic Design, Styles, our phases in creating Microelectronics chips computer Aided Synthesis and Optimization.

(b) Algorithms Review of Graph Definitions and Notations Decision and Optimization Problems, Shortest and Longest Path Problems, Vertex Cover, Graph, Coloring, Clique covering and partitioning Algorithms Boolean Algebra and representation of Boolean Functions, binary Decision diagrams. Satisfiability and cover problems.

2        Hardware Modeling: Introduction to Hardware Modeling Language distinctive features of Hardware Languages, Structural and Behavioral HDLs, Logic Network, State Diagrams. Data flow and Sequencing Graphs. Compilation and Behavioral Optimization Techniques.

3   Architectural Synthesis: Circuit Specifications for architectural Synthesis resources and constraints. Fundamental Synthesis problems Temporal  Domain Scheduling Spatial Domain Binding Hierarchical Models and Synchronization Problem. Area and performance estimation – Resource Dominated a circuits and General circuits.

4    Scheduling Algorithms: Model for Scheduling Problems, Scheduling without resource, constraints – Unconstrained Scheduling ASAP scheduling. Under Timing Constraints and Relative Scheduling With Resource Constraints Integer Linear Programming Model, Multiprocessor Scheduling, Heuristic Scheduling Algorithms (List Scheduling ). Force Directed Scheduling.

5        Two Level combination Logic Optimization: Logic Optimization Principles – definition, Exact Logic Minimiation, Heuristic, Logic Minimization, and Testability Properties Operations on Two level logic Covers-positional Cube Notation, Functions with Multivalued inputs and list oriefited manipulation. Algorithms for logic minimization.

6    Introdudction to VHDL: VHDL History and capabilities program Structure of VHDL Entity, Architecture and package Declarations. Basic Language Elements, Identifier, Data object, Data Types and Operator behavioral Modeling – process variable Assignment, Signal Assignment and Wait Statements. Assertion Loop, if, case and next Statement block and concurrent Assertion statements structural specifications of Hardware inverter; Nand gate Models, Comparator and Test Bench Modeling.               

Recommended Books:

1        Glovanni De Michell –Synthesis and Optimization of  Digital Circuits, Mc Graw Hill Inc.

2        Zainalabedin Navabi – VHDL Analysis and Modeling of Digital Sysem, Mc Graw Hill Inc.

3        J. Bhaskar – VHDL Primer, Addision Wesley.

4        Brassard – Algorithms, Prentice Hall.