III B.E. (Computer Engg.)

VIII SEMESTER

8 CP4.4 FAULT TO LERENT SYSTEMS

1.     INTRODUCTION: Impact of Scaling on Reliability –Supply voltage and power constraints, Threshold voltage control, Gate oxide reliability, Hot carrier degradation, Latchup susceptibility, Defects, Faults, Errors and reliability. Reliability Quality testing and measurement -AQL measurement, Burn-in-testing, I_DDQ and I_DD testing, Parametric testing. Mechanism for permanent Device Failure Design and

2.   DIAGNOSIS, REPAIR AND RECONFIGURATIONS: Diagnosis Algorithms -Stuck-at faults in read! write circuitry, Dominant Oil Bfs in read/write circuitry, SAPs and dominant-O and dominant -1, BFs in address decoders, Sequential stuck-open addressing faults, SAFs, BFs and CFs in the memory cell array, Coupling faults in an array of memory chips. Fault locations algorithm in DRAMs. Repair Algorithms -Tarr's greedy algorithms, Day's fault driven, Comprehensive redundancy algorithm, Kuo and Fuchs's branch-and- bound algorithms, Weyand Lombardi's graph-theoretic algorithm. Fast test and repair algorithms by Haddad et al. Neural Net approaches. Reconfiguration Techniques. Repair using FLASH EPROM Switches. Flexible Redundancy, Built-in Redundancy Analysis. Built-in self- repair Architectures -Hierarchical built-in-self repair and built-in self repair using new-al nets.

3.      SINGLE EVENTS EFFECTS AND THEIR MITIGATION: Particles causing Single-Event Effect -Terrestrial and space environment. Basic Mechanism for Non destructive Single-Event Effects -Charge deposition and collection. RAM Device operation -Dynamic RAM operation, Static RAM operation, Single-bit upsets and Multi bit upsets.

4.      ERROR CORRECTING CODES: Single and double-bit Error detecting and correcting codes. Fault- Tolerant Design Techniques for RAMs -Bit scattering. Sparing. Complement, Embedded and Non-embedded ECC.

Recommended Book:

1.    Kanad Chakraborty -Fault- Tolerance and Relativity Techniques for High Density Rams, Pearson Education Asia.