B.E. IV Sem Electronics & Communication Engineering

IV SEMESTER

4EC3. Digital Electronics

 

UNIT 1 : NUMBER SYSTEMS, BASIC LOGIC GATES & BOOLEAN ALGEBRA: Binary Arithmetic & Radix representation of different numbers. Sign & magnitude representation, complement notation, various codes & arithmetic in different codes & their inter conversion. Features of logic algebra, postulates of Boolean algebra. Theorems of Boolean algebra. Boolean function. Derived logic gates: Exclusive-OR, NAND, NOR gates, their block diagrams and truth tables. Logic diagrams from Boolean expressions and vica-versa. Converting logic diagrams to universal logic.
Positive, negative and mixed logic. Logic gate conversion.


UNIT 2 : DIGITAL LOGIC GATE CHARACTERISTICS: TTL logic gate characteristics. Theory & operation of TTL NAND gate circuitry. Open collector TTL. Three state output logic. TTL subfamilies. MOS & CMOS logic families. Realization of logic gates in RTL, DTL, ECL, C-MOS & MOSFET. Interfacing logic families to one another.


UNIT 3 : MINIMIZATION TECHNIQUES: Minterm, Maxterm, Karnaugh Map, K map upto 4 variables. Simplification of logic functions with K-map, conversion of truth tables in POS and SOP form. Incomplete specified functions. Variable mapping. Quinn-Mc Klusky minimization techniques.


UNIT 4 : COMBINATIONAL SYSTEMS: Combinational logic circuit design, half and full adder, subtractor. Binary serial and parallel adders. BCD adder. Binary multiplier. Decoder: Binary to Gray decoder, BCD to decimal, BCD to 7-segment decoder. Multiplexer, demultiplexer, encoder. Octal to binary, BCD to excess-3 encoder. Diode switching matrix. Design of logic circuits by multiplexers, encoders, decoders and demultiplexers.


UNIT 5 : SEQUENTIAL SYSTEMS: Latches, flip-flops, R-S, D, J-K, Master Slave flip flops. Conversions of flip-flops. Counters : Asynchronous (ripple), synchronous and synchronous decade counter, Modulus counter, skipping state counter, counter design. Ring counter. Counter applications. Registers: buffer register, shift register.